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A 4-MB On-Chip L2 Cache for a 90-nm 1.6-GHz 64-bit Microprocessor

McIntyre, H. et al.

IEEE journal of solid-state circuits.; IEEE international solid-state circuits conference; IEEE 2004 ISSCC, digital, technology directions, memory and signal processing; , 2004; Feb, 2005, 52-59 -- IEEE Solid-State Circuits Society,; 2005 Part: Part 1; (pages 52-59) -- 2005

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A 90 nm 1.8 V 512 Mb Diode-Switch PRAM With 266 MB/s Read Throughput

Lee, K.-J. et al.

IEEE journal of solid-state circuits.; IEEE international solid state circits conference (ISSCC); San Francisco, CA, 2007; Feb, 2008, 150-162 -- IEEE; 2008 (pages 150-162) -- 2008

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A 28 nm 0.6 V Low Power DSP for Mobile Applications

Ickes, N. et al.

IEEE journal of solid-state circuits.; Solid-state circuits; San Francisco, CA, 2011; Feb, 2012, 35-46 -- Institute of Electrical and Electronics Engineers; 2012 Part: Part 1; (pages 35-46) -- 2012

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3 results  for Everything in this catalogue

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  1. Wang, A.  (2)
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  1. Wang, A.
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