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A 4-MB On-Chip L2 Cache for a 90-nm 1.6-GHz 64-bit Microprocessor

McIntyre, H. et al.

IEEE journal of solid-state circuits.; IEEE international solid-state circuits conference; IEEE 2004 ISSCC, digital, technology directions, memory and signal processing; , 2004; Feb, 2005, 52-59 -- IEEE Solid-State Circuits Society,; 2005 Part: Part 1; (pages 52-59) -- 2005

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by this Author/Contributor:

  1. Wang, P.
  2. McIntyre, H.
  3. Wang, A.
  4. Seshadri, S.
  5. Hsu, W.

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