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Corrections to “Demonstration of Addressable Organic Resistive Memory Utilizing a PC-Interface Memory Cell Tester”

Cho, B. et al.

IEEE Electron device letters. VOL 34; NUMBER 3, ; 2013, 468 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS Part 3; -- 2013

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Demonstration of Addressable Organic Resistive Memory Utilizing a PC-Interface Memory Cell Tester

Cho, B. et al.

IEEE Electron device letters. VOL 34; NUMBER 1, ; 2013, 51-53 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS Part 1; (pages 51-53) -- 2013

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Demonstration of L~g ∼ 55 nm pMOSFETs With Si/Si~0~.~2~5Ge~0~.~7~5/Si Channels, High I~o~n/I~o~f~f (> 5 x 10^4), and Controlled Short Channel Effects (SCEs)

Lee, S.-H. et al.

IEEE Electron device letters. VOL 29; NUMB 9, ; 2008, 1017-1020 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS (pages 1017-1020) -- 2008

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Electron Mobility Enhancement Using Ultrathin Pure Ge on Si Substrate

Yeo, C. C. et al.

IEEE Electron device letters. VOL 26; NUMB 10, ; 2005, 761-763 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS (pages 761-763) -- 2005

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Evidence and Understanding of ALD HfO~2-Al~2O~3 Laminate MIM Capacitors Outperforming Sandwich Counterparts

Ding, S.-J. et al.

IEEE Electron device letters. VOL 25; NUMB 10, ; 2004, 681-683 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS (pages 681-683) -- 2004

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High-Performance MIM Capacitor Using ALD High-kappa HfO~2-Al~2O~3 Laminate Dielectrics

Ding, S.-J. et al.

IEEE Electron device letters. VOL 24; PART 12, ; 2003, 730-732 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS (pages 730-732) -- 2003

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Hot-Carrier Degradation Mechanism in Narrow- and Wide-Channel n-MOSFET's with Recessed LOCOS Isolation Structure

Yue, J. M. et al.

IEEE Electron device letters. VOL 21; PART 3, ; 2000, 130-132 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS (pages 130-132) -- 2000

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A Normally Off GaN n-MOSFET With Schottky-Barrier Source and Drain on a Si-Auto-Doped p-GaN/Si

Lee, H.-B. et al.

IEEE Electron device letters. VOL 27; NUMB 2, ; 2006, 81-83 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS (pages 81-83) -- 2006

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Process-Dependent N/PBTI Characteristics of TiN Gate FinFETs

Kim, J. J. et al.

IEEE Electron device letters. VOL 33; NUMBER 7, ; 2012, 937-939 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS Part: Part 7; (pages 937-939) -- 2012

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Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge

Hong, B. H. et al.

IEEE Electron device letters. VOL 32; NUMBER 9, ; 2011, 1179-1181 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS -- 2011

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  1. Cho, B. J.  (6)
  2. Cho, H. I.  (2)
  3. Chan, D. S. H.  (2)
  4. Ding, S. J.  (2)
  5. Cho, B  (2)
  6. Hu, H.  (2)
  7. Song, S  (2)
  8. Ji, Y.  (2)
  9. Kim, S. J.  (2)
  10. Lee, J. S.  (2)
  11. An, H. S.  (2)
  12. Jung, G. Y.  (2)
  13. Lee, H.-B.  (2)
  14. Lee, S. J.  (2)
  15. Lee, T  (2)
  16. Li, M. F.  (2)
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  1. Cho, B. J.
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  5. Cho, B

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