skip to main content
Show Results with:

Results 1 - 10 of 59  for Everything in this catalogue

results 1 2 3 4 5 next page
Refined by: journal title: IEEE journal of solid-state circuits. remove genre: Article remove
Result Number Material Type Add to My Shelf Action Record Details and Options
1
Material Type:
Article
Add to My workspace

A Low-Power Half-Delay-Line Fast Skew-Compensation Circuit

Wang, Y.-M.; Wang, J.-S.

IEEE journal of solid-state circuits. VOL 39; PART 6, ; 2004, 906-918 -- IEEE; 1998 (pages 906-918) -- 2004

Online access

2
Material Type:
Article
Add to My workspace

High-Speed and Low-Power CMOS Priority Encoders

Wang, J.-S. Huang, C.-H.

IEEE journal of solid-state circuits. VOL 35; PART 10, ; 2000, 1511-1514 -- IEEE; 1998 (pages 1511-1514) -- 2000

Online access

3
Material Type:
Article
Add to My workspace

Low-Voltage Pulsewidth Control Loops for SOC Applications

Yang, P.-H. Wang, J.-S.

IEEE journal of solid-state circuits. VOL 37; PART 10, ; 2002, 1348-1351 -- IEEE; 1998 (pages 1348-1351) -- 2002

Online access

4
Material Type:
Article
Add to My workspace

High-Performance and Power-Efficient CMOS Comparators

Huang, C.-H. Wang, J.-S.

IEEE journal of solid-state circuits. VOL 38; PART 2, ; 2003, 254-262 -- IEEE; 1998 (pages 254-262) -- 2003

Online access

5
Material Type:
Article
Add to My workspace

High-Speed and Low-Power Design Techniques for TCAM Macros

Wang, C.-C.; Wang, J.-S.; Yeh, C.

IEEE journal of solid-state circuits. VOL 43; NUMB 2, ; 2008, 530-540 -- IEEE; 1998 (pages 530-540) -- 2008

Online access

6
Material Type:
Article
Add to My workspace

Analysis and Design of High-Speed and Low-Power CMOS PLAs

Wang, J.-S. Chang, C.-R. Yeh, C.

IEEE journal of solid-state circuits. VOL 36; PART 8, ; 2001, 1250-1262 -- IEEE; 1998 (pages 1250-1262) -- 2001

Online access

7
Material Type:
Article
Add to My workspace

Design of 3-V 300-MHz Low-Power 8-b x 8-b Pipelined Multiplier Using Pulse-Triggered TSPC Flip-Flops

Wang, J. S.; Yang, P. H.; Sheng, D.

IEEE journal of solid-state circuits. VOL 35; PART 4, ; 2000, 583-592 -- IEEE; 1998 (pages 583-592) -- 2000

Online access

8
Material Type:
Article
Add to My workspace

Design of High-Performance CMOS Priority Encoders and Incrementer/Decrementers Using Multilevel Lookahead and Multilevel Folding Techniques

Huang, C.-H. Wang, J.-S. Huang, Y.-C.

IEEE journal of solid-state circuits. VOL 37; PART 1, ; 2002, 63-76 -- IEEE; 1998 (pages 63-76) -- 2002

Online access

9
Material Type:
Article
Add to My workspace

Low-Power Embedded SRAM with the Current-Mode Write Technique

Wang, J. S.; Tseng, W.; Li, H. Y.

IEEE journal of solid-state circuits. VOL 35; PART 1, ; 2000, 119-124 -- IEEE; 1998 (pages 119-124) -- 2000

Online access

10
Material Type:
Article
Add to My workspace

Analysis and Design of a New Race-Free Four-Phase CMOS Logic

Wu, C.-Y.; Cheng, K.-H.; Wang, J.-S.

IEEE journal of solid-state circuits. VOL 28; NUMBER 1, ; 1993, 18 -- IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS Part: Part 1; -- 1993

Online access

Results 1 - 10 of 59  for Everything in this catalogue

results 1 2 3 4 5 next page

Refine Search Results

Refine my results

Access Options 

  1. Online: Reading Room only  (43)
  2. Request to Reading Room  (16)
  3. Refine further open sub menu

Creation date 

From To
  1. Before2000  (5)
  2. 2000To2003  (11)
  3. 2004To2007  (12)
  4. 2008To2012  (16)
  5. After 2012  (15)
  6. Refine further open sub menu

Try a new search

Ignore my search and look for everything

by this Author/Contributor:

  1. Wang, J.-S.
  2. Wang, H.
  3. Wang, J.
  4. Wang, X.
  5. Yeh, C.

Searching Remote Databases, Please Wait