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A 1-GS/s 11-bit ADC With 55-dB SNDR, 250-mW Power Realized by a High Bandwidth Scalable Time-Interleaved Architecture

Gupta, S. K.; Inerfield, M. A.; Wang, J.

IEEE journal of solid-state circuits.; IEEE International solid-state circuits conference; San Francisco, CA, 2006; Feb, 2006, 2650-2657 -- IEEE; 2006 (pages 2650-2657) -- 2006

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by this Author/Contributor:

  1. Gupta, S. K.
  2. Wang, J
  3. Inerfield, M. A.

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  1. Solid state circuits

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