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1
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Patent
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Mechanism to emulate user-level multithreading on an os-sequestered sequencer

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2
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Transparent support for operating system services

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3
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Patent
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Apparatus, system, and method for persistent user-level thread

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4
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Patent
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Transparent support for operating system services for a sequestered sequencer

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5
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Patent
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Mechanism to schedule threads on os-sequestered without operating system intervention

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6
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Patent
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Instruction set architecture-based inter-sequencer communicating with a heterogeneous resource

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7
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Patent
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Mechanism for instruction set based thread execution on a plurality of instruction sequencers

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8
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Patent
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MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION ON A PLURALITY OF INSTRUCTION SEQUENCERS

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9
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Patent
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Apparatus, System, And Method For Persistent User-Level Thread

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10
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Patent
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MECHANISM FOR INSTRUCTION SET BASED ON THREAD EXECUTION ON PLURALITY OF INSTRUCTION SEQUENCERS

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by this Author/Contributor:

  1. Wang Hong
  2. Shen John
  3. Bigbee Bryant
  4. Chinya Gautham
  5. Sethi Prashant

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