skip to main content
Show Results with:

The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade

Cadeddu, S. et al.

Nuclear instruments and methods in physics research section A. Volume 936: (2019, August 21st); pp 378-379 -- Elsevier

Online access

  • Title:
    The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade
  • Author: Cadeddu, S.;
    Casu, L.;
    Brundu, D.;
    Cardini, A.;
    Lai, A.;
    Loi, A.;
    Albicocco, P.;
    Balla, A.;
    Carletti, M.;
    Ciambrone, P.;
    Gatta, M.
  • Found In: Nuclear instruments and methods in physics research section A. Volume 936: (2019, August 21st); pp 378-379
  • Journal Title: Nuclear instruments and methods in physics research section A
  • Subjects: Time measurement--Readout electronics--Radiation-hard electronics--Large hadron collider; Dewey: 539.7
  • Rights: Licensed
  • Publication Details: Elsevier
  • Abstract: Abstract The nSYNC chip is a radiation tolerant custom ASIC, developed in UMC 130 nm technology, and the main component of the new readout electronics for the LHCb Muon Detector Upgrade. The nSYNC has been developed in order to implement all the required functionalities for the readout upgrade in terms of timing alignment and measurements, and equipped also with control and monitoring features. The internal architecture of the chip, the data flow and test results on different nSYNC functionalities are presented.
  • Identifier: System Number: ETOCvdc_100089020193.0x000001; Journal ISSN: 0168-9002; 10.1016/j.nima.2018.09.149
  • Publication Date: 2019
  • Physical Description: Electronic
  • Shelfmark(s): 6180.861300
  • UIN: ETOCvdc_100089020193.0x000001

Searching Remote Databases, Please Wait