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Design Techniques for Single-Low-V~D~D CMOS Systems

Wang, J.-S. et al.

IEEE journal of solid-state circuits. VOL 40; NUMB 5, ; 2005, 1157-1165 -- IEEE; 1998 (pages 1157-1165) -- 2005

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  • Title:
    Design Techniques for Single-Low-V~D~D CMOS Systems
  • Author: Wang, J.-S.;
    Li, H.-Y.;
    Yeh, C.;
    Chen, T.-F.
  • Found In: IEEE journal of solid-state circuits. VOL 40; NUMB 5, ; 2005, 1157-1165
  • Journal Title: IEEE journal of solid-state circuits.
  • Subjects: LCC: TK7871.85; Dewey: 621 621.3
  • Publication Details: IEEE; 1998
  • Language: English
  • Identifier: Journal ISSN: 0018-9200
  • Publication Date: 2005
  • Physical Description: Electronic
  • Accrual Information: Monthly
  • Shelfmark(s): 4362.985500
  • UIN: ETOCRN168090831

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