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Design of 3-V 300-MHz Low-Power 8-b x 8-b Pipelined Multiplier Using Pulse-Triggered TSPC Flip-Flops

Wang, J. S.; Yang, P. H.; Sheng, D.

IEEE journal of solid-state circuits. VOL 35; PART 4, ; 2000, 583-592 -- IEEE; 1998 (pages 583-592) -- 2000

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  • Title:
    Design of 3-V 300-MHz Low-Power 8-b x 8-b Pipelined Multiplier Using Pulse-Triggered TSPC Flip-Flops
  • Author: Wang, J. S.;
    Yang, P. H.;
    Sheng, D.
  • Found In: IEEE journal of solid-state circuits. VOL 35; PART 4, ; 2000, 583-592
  • Journal Title: IEEE journal of solid-state circuits.
  • Subjects: LCC: TK7871.85; Dewey: 621 621.3
  • Publication Details: IEEE; 1998
  • Language: English
  • Identifier: Journal ISSN: 0018-9200
  • Publication Date: 2000
  • Physical Description: Electronic
  • Accrual Information: Monthly
  • Shelfmark(s): 4362.985500
  • UIN: ETOCRN078475377

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